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Realization of digital filter with MATLAB and FPGA: Altera Verilog version
Update : 2020-11-02 Size : 41.62mb Publisher : 小博小超人

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Realization of digital filter with MATLAB and FPGA: Altera Verilog version
Update : 2020-11-02 Size : 34.86mb Publisher : 小博小超人

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Scroll bar display. Through HDMI interface output monochrome pattern, gradient color, single mosaic, dynamic mosaic and other patterns. Using Verilog, based on Xilinx spartan-6 LX45 device, ax6045 development board
Update : 2025-01-22 Size : 3.08mb Publisher : 听丨雨

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The asynchronous FIFO implemented by Verilog is divided into read-write control module, SRAM core module and synchronization module
Update : 2025-01-22 Size : 2kb Publisher : wt2110

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SPI serial port simple data communication experiment, to achieve data transmission
Update : 2025-01-22 Size : 3.75mb Publisher : li~~~~

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DMA code based on hbird_e203 system
Update : 2025-01-22 Size : 6kb Publisher : 飞扬飘逸

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VHDL BISS,SSI,ENDAT2.2, ENCODER
Update : 2020-11-26 Size : 36kb Publisher : ancirl

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Design Compiler Workshop Tutorial Document Operation Manual
Update : 2025-01-22 Size : 12.2mb Publisher : awaaaaaaay

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Using vivado and Xilinx development board to realize VGA image display, the development board is Xilinx artix-7
Update : 2025-01-22 Size : 11kb Publisher : 懂王

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Using vivado and Xilinx development board to realize Bluetooth remote control, the development board is Xilinx artix-7
Update : 2025-01-22 Size : 197kb Publisher : 懂王

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Verilog code for ppm encoding and decoding, RTL description
Update : 2025-01-22 Size : 28kb Publisher : 孔_刘

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The second EDA assignment of basic course of digital electronic technology is coin charger.
Update : 2025-01-22 Size : 28kb Publisher : smcgorange
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