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VHDL-FPGA-Verilog list
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1. Design and implement a random number generating circuit, which generates randomly every 2 seconds Form a number between 0 and 999 and display it on the nixie tube Generated random number. 2. Set a reset key for the sy
Update : 2020-06-09 Size : 4.53mb Publisher : Minbadly

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a CNN accelerator written in VerilogHDL, including one conv layer and one pooling layer, simulation passed
Update : 2024-12-21 Size : 1.72mb Publisher : gothic22

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a bi-elevator controller written in VerilgHDL, which has floor1-9, simulation passed
Update : 2024-12-21 Size : 245kb Publisher : gothic22

150 classic programming examples of Verilog
Update : 2024-12-21 Size : 111kb Publisher : 叫我小白呀

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The digital pulse width modulation module is realized by Verilog. The main modules are PLL, counter and multiplexer
Update : 2024-12-21 Size : 489kb Publisher : lw1997

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CRC verification in Verilog: CRC 16
Update : 2024-12-21 Size : 3kb Publisher : suncrystal

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there are eight input buttons in the elevator to respond to the user's request for going up and down the floor
Update : 2020-07-18 Size : 1.61mb Publisher : wtq0

130 sets of resume template FPGA system design and verification, including a variety of common FPGA programming, ad, RS485, Ethernet, etc.
Update : 2024-12-21 Size : 31.57mb Publisher : 哼哼嘻嘻

With DSP and FPGA as the hardware architecture and DSP as the data processing core, the peripheral devices such as USB, ADC and DAC are controlled by FPGA, and the digital signal processing algorithms such as spectrum an
Update : 2024-12-21 Size : 672kb Publisher : 小冰2

Labview调用Halcon实现NCC匹配
Update : 2020-07-30 Size : 273.25kb Publisher : 717637845

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The sending and receiving of LVDS are realized
Update : 2024-12-21 Size : 4kb Publisher : E=MC2

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APB bus interface to I2C bus interface
Update : 2024-12-21 Size : 435kb Publisher : AyanamiC
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