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VHDL-FPGA-Verilog list
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Verilog - Brent-Kung Adder 32-bits
Update : 2025-01-13 Size : 9kb Publisher : ody

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Verilog - Combinational part of Carry-Save adder, 4 operands 64-bits
Update : 2025-01-13 Size : 7kb Publisher : ody

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Verilog - Description of a 4 operand 64-bit Hans-Carlson adder
Update : 2025-01-13 Size : 11kb Publisher : ody

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FPGA realize I2C communication function module
Update : 2025-01-13 Size : 207kb Publisher : skyue23214265

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According to the ASMD diagram design, verify the bubble sorting algorithm. Give the design procedure and the simulation result in time, including paper report.
Update : 2025-01-13 Size : 3.72mb Publisher : yuanhong95

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To achieve real-time operation of the system, to help newcomers just to understand
Update : 2025-01-13 Size : 3.49mb Publisher : xuanyuan312

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Verilog HDL Introductory Grammar data
Update : 2025-01-13 Size : 2.79mb Publisher : zedder

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FPGA sparten-6 AX-309 uart connection example
Update : 2025-01-13 Size : 377kb Publisher : 小也先生

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verilog i2c master rtl+testbench
Update : 2025-01-13 Size : 3kb Publisher : Teray

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Verilog i2c slave rtl + testbench
Update : 2025-01-13 Size : 8kb Publisher : Teray

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Carry addition, to achieve the addition function of two numbers, can be extended to the number of add
Update : 2025-01-13 Size : 252kb Publisher : 凌风ts

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FPGAs based hash table
Update : 2025-01-13 Size : 35kb Publisher : DoubleP
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