VHDL-FPGA-Verilog List Page 30

VHDL-FPGA-Verilog list

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429recive Downloaded：1: FPGA to achieve the 429 board to receive the signal sent, and according to the data of the last two of the corresponding LED.
Update : 2024-12-23 Size : 2.04mb Publisher : 毛云峰
dct_parallel.tar Downloaded：0: paralel DCT hardware in verilog with testbench
Update : 2024-12-23 Size : 340kb Publisher : victor
CRC16 Downloaded：0: CRC cyclic redundancy check code execution and description
Update : 2024-12-23 Size : 289kb Publisher : huangyichen
agc Downloaded：0: automatic gain control Verilog
Update : 2024-12-23 Size : 1kb Publisher : luoji
sycclk Downloaded：0: it s modul of clock in fpga vhdl where the cycle is 25 MHz enjoy
Update : 2024-12-23 Size : 3kb Publisher : hicham402
led Downloaded：0: Marquee realize verilog program easier to learn for beginners program straightaway
Update : 2024-12-23 Size : 31kb Publisher : 啧啧啧
dwinTest Downloaded：0: use for dwin test
Update : 2024-12-23 Size : 909kb Publisher : wx123321
free_map Downloaded：0: The target is the first field so just update the pointers.
Update : 2024-12-23 Size : 4kb Publisher : nanzgfun
txd_interface Downloaded：0: uart TXD Verilog
Update : 2024-12-23 Size : 1kb Publisher : 王峰
zongceshi Downloaded：0: HC6800-ES V2.0
Update : 2024-12-23 Size : 215kb Publisher : Tony Alvin
CPU Downloaded：0: The purpose of this project is to design a simple CPU (Central Processing Unit). This CPU has basic instruction set, and we will utilize its instruction set to generate a very simple program to verify its performance. Fo
Update : 2024-12-23 Size : 7.07mb Publisher : 马晨
S26 Downloaded：0: this is S26 program in visual studio, c
Update : 2024-12-23 Size : 3.48mb Publisher : adfas

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