VHDL-FPGA-Verilog List Page 384

VHDL-FPGA-Verilog list

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m_counter Downloaded：0: this project about compteur m bit compiled and implanted in cart fpga xilinx 3E, with file .HDL and .bit
Update : 2025-01-18 Size : 565kb Publisher : gps
diviseurFrquence50MhzTo1hz Downloaded：0: this file about frequency divider 50 MHz to 1 Hz used in 7-segment display
Update : 2025-01-18 Size : 413kb Publisher : gps
jiecheng Downloaded：0: Function calls use Verilog language implementation of the factorial function computing
Update : 2025-01-18 Size : 1kb Publisher : 坚果墙
niosLED Downloaded：0: FPGA LED
Update : 2025-01-18 Size : 12.08mb Publisher : 孙延帅
cic_40Mhz Downloaded：0: CIC filter of FPGA design in 40MHz，content is complete
Update : 2025-01-18 Size : 7kb Publisher : 程联开
fir Downloaded：0: fpga design FIR filters, the content is complete
Update : 2025-01-18 Size : 7.79mb Publisher : 程联开
keshengsheji Downloaded：0: altera company cycloneIII curriculum design based on main function is to answer the players, there is a countdown, after a player who was unable to answer other answer, and stop the countdown, if no one answer, the count
Update : 2025-01-18 Size : 1.45mb Publisher : 刘咯
mux4_to_1 Downloaded：0: this files in quartus2 are 4 to 1 mux
Update : 2025-01-18 Size : 2kb Publisher : woo
audio_test Downloaded：0: FPGA WM8731 CODEC record & play demo
Update : 2025-01-18 Size : 12.87mb Publisher : 徐凡
DDS Downloaded：0: DDS，A key digital technology, all-digital implementation, ease of integration, small size and light weight.
Update : 2025-01-18 Size : 40kb Publisher : 姜凌珂
rx_uart Downloaded：0: rx_uart.uart is a universal asynchronous receiver transmitter, is part of the computer hardware.
Update : 2025-01-18 Size : 3.33mb Publisher : 姜凌珂
fulladd Downloaded：0: this files in Quartus2 are fulladder
Update : 2025-01-18 Size : 149kb Publisher : woo

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