Experiment IV Cymometer experimental requirements: design of an effective place for the 4 decimal digital frequency meter. Update : 2025-01-29
Size : 133kb
Publisher : 朱伟成
After four issues克鲁卡斯尔algorithm algorithms and concrete realization of algorithms, has been running before. Update : 2025-01-29
Size : 1kb
Publisher : 曾阿芷
Verilog hdl North courseware! Internal information, including a large number of engineering practice, is to learn from the good information Update : 2025-01-29
Size : 1.48mb
Publisher : jackie
8-bit CPU of the VHDL design, 16 instruction, as well as some of the test code, development tools is quartusii_60_pc Update : 2025-01-29
Size : 3kb
Publisher : FJ
Electronic stopwatch, can display 0.01S to 59 59 99. With a moratorium, rehabilitation located in a key control functions. Update : 2025-01-29
Size : 1kb
Publisher : jacky