VHDL-FPGA-Verilog List Page 3974

VHDL-FPGA-Verilog list

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SDR_SDRAM_controler_verilog Downloaded：0: Can use the generic SDRAM controller can be used in the FPGA, the SDR is the type of
Update : 2025-01-16 Size : 9kb Publisher : 郑宏超
yw Downloaded：0: Own procedures for the lantern will know very well spent to make a really
Update : 2025-01-16 Size : 254kb Publisher : 付长洲
chuan_to_bing Downloaded：0: 16 bit A/D conversion program, using MAX+PLUS2 to do the state machine, but not perfect, I hope you understand
Update : 2025-01-16 Size : 1kb Publisher : 邓孟楠
can_IPCORE Downloaded：0: CAN bus IPCORE, using Verilog HDL language.
Update : 2025-01-16 Size : 60kb Publisher : feifei
sin Downloaded：0: Sinusoidal signal generator procedures, used to write Verilog.
Update : 2025-01-16 Size : 2.41mb Publisher : 112254
DUC Downloaded：0: DUC is a digital up-conversion and digital down conversion that corresponds to the work of ddc. Realize the current approach are: ASIC, DSP and FPGA generic realize three. This procedure is given that the company XILINX
Update : 2025-01-16 Size : 298kb Publisher : 周严
LFSR Downloaded：0: lfsr implement in fpga
Update : 2025-01-16 Size : 1kb Publisher : majid
I2C_verilog Downloaded：0: Verilog design using a simple and practical I2C bus controller, for everyone to learn FPGA and I2C bus interface and other related knowledge has a greater help.
Update : 2025-01-16 Size : 510kb Publisher : 郑玮
MFSK Downloaded：0: Based on the VHDL hardware description language, completion of the base-band signal MFSK modulation, source
Update : 2025-01-16 Size : 1kb Publisher : zhangjia
frequence Downloaded：1: FPGA-based design of digital frequency meter, use VHDL to write code. . . . Each module has 6
Update : 2025-01-16 Size : 2kb Publisher : 张新福
USB2_0CY7C68013FPGAVerilogHD Downloaded：0: cy68013 interface with the FPGA design veriloghdl
Update : 2025-01-16 Size : 357kb Publisher : 高嵩
AM_Modulation Downloaded：0: Am modulation implement fpga
Update : 2025-01-16 Size : 1kb Publisher : majid

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