VHDL-FPGA-Verilog List Page 3981

VHDL-FPGA-Verilog list

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FSK Downloaded：0: FPGA using VHDL written FSK procedures, control of a flexible, complete works
Update : 2025-01-16 Size : 265kb Publisher : wanyou
Coder_8_3 Downloaded：0: Verilog HDL achieved with 83 encoders.
Update : 2025-01-16 Size : 81kb Publisher : zhuangqi
Compare_8_bits Downloaded：0: Realized using Verilog language 8Bit encoder.
Update : 2025-01-16 Size : 91kb Publisher : zhuangqi
Decoder_3_8 Downloaded：0: Verilog language used to achieve a common decoder 3-8.
Update : 2025-01-16 Size : 76kb Publisher : zhuangqi
Full_Adder Downloaded：0: Verilog language used to achieve the full adder can be integrated to simulation through
Update : 2025-01-16 Size : 70kb Publisher : zhuangqi
JK_FF Downloaded：0: Verilog language used to achieve the JK flip-flop can be integrated to simulation through
Update : 2025-01-16 Size : 74kb Publisher : zhuangqi
pinlvji Downloaded：0: Simple digital frequency meter, source for the input, can measure their frequencies maxplux use, the need for standards 1Hz clock signal.
Update : 2025-01-16 Size : 6kb Publisher : xzy
ps2_1 Downloaded：0: EDA Experimental PS2 keyboard experiment: the use of the keyboard as input devices, displays as output devices, FPGA to keyboard input of the numeric keys to encode the encoding, and then displayed on the monitor.
Update : 2025-01-16 Size : 2kb Publisher : 黄龙
transfer_1 Downloaded：0: EDA experiment -UART serial port experiment: UART consists of data bus interface, control logic, baud rate generator, sending part and receiving part. UART transmitter The transmitter is output 1 bit every 16 CLK16 clock
Update : 2025-01-16 Size : 2kb Publisher : 黄龙
AvalonPwm Downloaded：0: SOPC Experimental Hello World Experiment: Start Quartus II software, choose File → New Project Wizard, in the resulting dialog box fill in the name of 2 items, click Finish, and then select
Update : 2025-01-16 Size : 1.4mb Publisher : 黄龙
sopc Downloaded：1: The SOPC experiment - custom PWM components: take a PWM component with an Avalon Slave interface as an example of how to customize the components. An Avalon Slave interface can have CLK, chipselect, address, read, readda
Update : 2025-01-16 Size : 6.83mb Publisher : 黄龙
8086vga Downloaded：0: : Two table tennis Requires: D2SB and DIO4 with VGA monitor and PS2 Keyboard
Update : 2025-01-16 Size : 1.89mb Publisher : wangdi

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