VHDL-FPGA-Verilog List Page 4273

VHDL-FPGA-Verilog list

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bin27seg_vhdl Downloaded：0: prepared using VHDL paragraph 107 of the procedures Digital Display
Update : 2024-12-23 Size : 1kb Publisher : 陈旭
一个简单的UART Downloaded：1: using VHDL prepared a simple UART
Update : 2024-12-23 Size : 3kb Publisher : 陈旭
用VHDL语言在CPLD上实现串行通信 Downloaded：0: using VHDL on the CPLD Serial Communication
Update : 2024-12-23 Size : 4kb Publisher : 陈旭
FFT变换的IP核的源代码 VHDL~ Downloaded：0: FFT IP core of the source code for VHDL ~
Update : 2024-12-23 Size : 31kb Publisher : 陈旭
vgaout Downloaded：0: VHDL by VGA interface standards, digital image signal conversion into a standard VGA format. Suitable for the pilot study
Update : 2024-12-23 Size : 7kb Publisher : 余飞
zlgz Downloaded：0: simple electronic toys perception module programming, through external input signal a change in the internal signal. In order to change the state of toys
Update : 2024-12-23 Size : 1kb Publisher : 星麒麟
Alu1232 Downloaded：0: VHDL development of the counter. Source code is not complicated, should be able to understand. The most important Note : Timing is the issue
Update : 2024-12-23 Size : 1kb Publisher : 张念华
微处理器的设计与实现 Downloaded：0: a simple microprocessor to achieve, for several common to the operation of the computer for those familiar with the working principle helpful, and with the detailed design reports and design ideas. The word is the final
Update : 2024-12-23 Size : 438kb Publisher : 郭慧勤
数字频率计实验报告 Downloaded：1: curriculum design and FPGA design to achieve a digital frequency meter, the specific design requirements are as follows : measurement frequency range : 10Hz to 100KHz precision : F/F 2% external clock system : 1024Hz Wav
Update : 2024-12-23 Size : 141kb Publisher : 兰
seller2 Downloaded：0: program vending machine at the core function, with three kinds of commodity prices, the number of choice, having to function.
Update : 2024-12-23 Size : 2kb Publisher : 陆文娟
引爆器 Downloaded：0: digit passwords detonated's input Description : one at the start and enter the password before the wait state, according to First READY button, now ready to be imported into digital code; Two, when detonated after the in
Update : 2024-12-23 Size : 24kb Publisher : 刘卫
电子钟clock Downloaded：0: use VHDL to achieve an electronic clock, the time can be set aside. Hours, minutes and seconds. Experiments can be downloaded to the box to run test.
Update : 2024-12-23 Size : 345kb Publisher : 刘卫

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