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VHDL-FPGA-Verilog list
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four division of VHDL source
Update : 2024-12-23 Size : 1kb Publisher : 张庆辉

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four Multiplier VHDL source
Update : 2024-12-23 Size : 1kb Publisher : 张庆辉

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This is compatible CPU 8051 VHDL, it is not a tort. God bless!
Update : 2024-12-23 Size : 34kb Publisher : 张念华

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useful VHDL source code
Update : 2024-12-23 Size : 577kb Publisher : 王新

VHDL basic arithmetic library
Update : 2024-12-23 Size : 242kb Publisher : 崔广辉

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the VHDL-ahead Adder
Update : 2024-12-23 Size : 42kb Publisher : 安鹏洲

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USB1.1 IP core for device control, written with hardware describing language of Verilog.
Update : 2024-12-23 Size : 128kb Publisher : 李恒

1:1 generic-frequency module
Update : 2024-12-23 Size : 1kb Publisher : 陈平

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with AHDL prepared MAXPULS development. Communications from external clock rate and restriction on the number of data bytes.
Update : 2024-12-23 Size : 1kb Publisher : 陈瑞

UART source (lattice version)
Update : 2024-12-23 Size : 85kb Publisher : 了类似

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VHDL Programing
Update : 2024-12-23 Size : 1.7mb Publisher : 陈凯

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xilinx simulator programme of serial port
Update : 2024-12-23 Size : 9kb Publisher : 赵兴涛
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