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VHDL-FPGA-Verilog list
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This a hexadecimal display decoder may be implemented on EDA board, we hope to help
Update : 2025-01-19 Size : 1kb Publisher : 郎金溪

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Audio port of Verilog
Update : 2025-01-19 Size : 2kb Publisher : ZHU

Achieve coordinate transformation, including clark and park transform, clarke transform phase static coordinate conversion to the two-phase stationary coordinate, park transform two-phase stationary coordinate conversion
Update : 2025-01-19 Size : 1kb Publisher : cpf

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TLV5630 DA converter chip FPGA control program source code, verilog prepared
Update : 2025-01-19 Size : 3.33mb Publisher : 陈照

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Achieve signal filtering, the filter can be changed according to the characteristics of the external clock signal glitch to change the filter width
Update : 2025-01-19 Size : 5kb Publisher : cpf

CY7C68013A chip transceiver FPGA control procedures, debugging through, the maximum speed of 18M
Update : 2025-01-19 Size : 12.97mb Publisher : 陈照

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Achieve PWM output dead time control, can guarantee to avoid simultaneous conduction of upper and lower leg damage power devices
Update : 2025-01-19 Size : 3kb Publisher : cpf

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FPGA prepared by the serial transmission program, debugging through, sub-modules.
Update : 2025-01-19 Size : 697kb Publisher : 陈照

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By comparing the triangular carrier wave and sine wave to achieve SPWM modulation algorithm can be applied to the motor control and other fields
Update : 2025-01-19 Size : 1.09mb Publisher : cpf

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Realize PI control algorithm parameters by adjusting the proportional-integral PI closed-loop control can be achieved for different applications
Update : 2025-01-19 Size : 377kb Publisher : cpf

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32 BIT PRECISION ARITHMETIC
Update : 2025-01-19 Size : 1.53mb Publisher : ishu

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ADDER AND ACCUMULATOR
Update : 2025-01-19 Size : 2.17mb Publisher : ishu
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