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VHDL-FPGA-Verilog list
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Hardware description language to realize an adder, development environment using the libreo, with Verilog language
Update : 2025-03-14 Size : 1kb Publisher : 刘锋 -
Realization of audio I2S communications, audio column display, and its noise processing, and other functions
Update : 2025-03-14 Size : 7.23mb Publisher : sun -
It is 5x1 median filter arithmetic.
Update : 2025-03-14 Size : 1kb Publisher : 梁雄 -
A serial port function hardware debugging, serial port function, VHDL language
Update : 2025-03-14 Size : 1kb Publisher : lzx -
Digital tube display the date, written in verilog language, eight digital tube can be cyclic shift to the left
Update : 2025-03-14 Size : 3kb Publisher : lzx -
IFFT fast Fourier inverse transformation of the FPGA implementation
Update : 2025-03-14 Size : 1kb Publisher : lzx -
video rotate
Update : 2025-03-14 Size : 5kb Publisher : sqh -
Quartus13.0 create NIOS2 introduction
Update : 2025-03-14 Size : 3.54mb Publisher : mengmeng -
Verilog HDL introduction
Update : 2025-03-14 Size : 257kb Publisher : mengmeng -
CIC CORE is very good core for your projects.
Update : 2025-03-14 Size : 87kb Publisher : afshin shoeibi -
Hilbert Transform Core is very best for your projects.
Update : 2025-03-14 Size : 791kb Publisher : afshin shoeibi -
Through the SPI interface to a period of 16 length is 8-bit wide configuration register assignment. These configuration registers are readable and writable. And to prepare excitation test, read-after-write, verify functi
Update : 2025-03-14 Size : 1kb Publisher : 粥米