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VHDL-FPGA-Verilog list
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Alu
Downloaded:0
alu a part of cpu can add sub and so on
Update
: 2025-01-20
Size
: 85kb
Publisher
:
Richar
counter
Downloaded:0
counter use for countering number use Verilog accelmber
Update
: 2025-01-20
Size
: 105kb
Publisher
:
Richar
lcd1602_test
Downloaded:0
FPGA experiment: the first line of LCD second show to FPGA Welcome, the 1602 line shows the digital cycle of 0-9, and set the reset button. Learn the 1602 LCD display design, understand the specific structure of 1602 LCD
Update
: 2025-01-20
Size
: 1.53mb
Publisher
:
丁明凯
AD0804
Downloaded:0
ADC0804 FPGA experiment (1) program is to use ADC0804 00-FF (2) will be converted into 0-255 (3) will be converted into 0-5.0V (4) if the input voltage is greater than 2.5V, set the alarm lights. This program is based on
Update
: 2025-01-20
Size
: 1.73mb
Publisher
:
丁明凯
DA_TLC5620
Downloaded:0
FPGA tlc5620: to the program downloaded to the box observed phenomenon and combined with the phenomenon of program understanding meaning and the realization of single channel DA conversion: after the channel is pressed t
Update
: 2025-01-20
Size
: 2.47mb
Publisher
:
丁明凯
Parallel_SQRT
Downloaded:0
32-bit parallel integer square root
Update
: 2025-01-20
Size
: 3kb
Publisher
:
khersasali123
VHDL-projects
Downloaded:0
I have simple five VHDL projects. I use FPGA Spartan3A family board with XC3S50A FPGA chip. This project was created in Xilinx ISE Design Suite version (13.2).It contains divider,XOR blocks, counters, moore automat and m
Update
: 2025-01-20
Size
: 1.44mb
Publisher
:
Jaroslav
fpga
Downloaded:0
FPGA code, including the address decoder module 16 latches, AD chip select, filter out the dead and narrow pulse, overcurrent and short circuit protection, lifting the blockade pulse module, PWM module, PWM selection
Update
: 2025-01-20
Size
: 168kb
Publisher
:
qiqi
lvds
Downloaded:0
lvds communication protocol procedures have been transferred through, and contains some relevant information
Update
: 2025-01-20
Size
: 4.88mb
Publisher
:
qiqi
5_ADC_Lab
Downloaded:0
ADC-based debugger altera company MAX 10 type of FPGA
Update
: 2025-01-20
Size
: 6.47mb
Publisher
:
qiqi
6_USB_to_SDHC_Lab
Downloaded:0
Altera company based debugger MAX 10 type of FPGA to sdhc usb communication
Update
: 2025-01-20
Size
: 2.7mb
Publisher
:
qiqi
8_MIPI_to_HDMI_Terasic
Downloaded:0
Altera company based debugger type of FPGA MAX 10 spi to hdmi communication
Update
: 2025-01-20
Size
: 3.19mb
Publisher
:
qiqi
«
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.63
.64
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.67
468
.69
.70
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.72
.73
...
4311
»
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