Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: zzx Download
 Description: err
 Downloaders recently: [More information of uploader zzx5460]
 To Search: VHDL
  • [VHDL_100Examples] - Beijing University Institute of ASIC des
  • [S2P_xapp194] - VHDL, verilog Series and conversion comp
  • [SPtransform] - Verilog HDL Series and the preparation o
  • [p2s16_1] - Some time ago to see someone in the onli
  • [UART] - Input clock 20M, the baud rate for 9600,
  • [bc_6] - To implement the six-bit data width and
  • [1253] - Based on the VHDL language and string co
  • [parell_to_serial] - The module main is completed and the str
  • [vhdl_source] - MP3 for XPLA3 XILINX.CPLD, must XILINX u
  • [readme_vhd] - SERDES VHDL source code, you can achieve
File list (Check if you may need any files): 
zzx.doc

CodeBus www.codebus.net