Description: UART VerilogCommand Parsing NiosII serial serial parts, including the interruption, send the command prompt, receiving treatment and other characters. Spent a lot of hard work! Definitely useful for beginners
- [uart_verilog] - include UART port of VERILOG source, the
- [UART] - UART serial procedures, verilog statemen
- [uart] - This is the UART controller, has been ru
- [uart] - Realize the use of CPLD serial communica
- [RS232] - RS232 serial communication protocol, ver
- [async_transmitter] - async_transmitter verilog module
- [uart] - verilog written communication and comput
- [uart] - uart verilog
- [UART] - I have written of the FPGA asynchronous
- [Verilog] - The code is Veriloghdl language of the s
File list (Check if you may need any files):
rcvr_tf.v
txmit.v
txmit_tf.v
uart.v
rcvr.v
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