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Description: 结合XILINXCPLD所做的模拟RS232通信verilog源程序-XILINXCPLD combine the simulation RS232 communication Verilog source
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Size: 121856 |
Author: 于飞 |
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Description: FPGA实现RS-232串口收发的Verilog程序,已经调通。-FPGA realization of RS-232 serial port to send and receive the Verilog procedures, Qualcomm has been transferred.
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Size: 2048 |
Author: |
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Description: RS232 verilog design
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Size: 114688 |
Author: liuKe |
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Description: RS232的verilog源代码,如果需要的可以-RS232 of Verilog source code, if necessary can be
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Size: 10240 |
Author: 陈强 |
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Description: dp_xiliux 的 CPLD Verilog设计实验,串口演示.代码测试通过. -dp_xiliux the CPLD Verilog design experiments, serial presentation. code test.
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Size: 121856 |
Author: pp |
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Description: RS232串口通信协议,verilog实现,通过FPGA完全调通。-RS232 serial communication protocol, verilog achieved entirely through the FPGA transfer pass.
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Size: 3072 |
Author: dingsheng |
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Description: RS232 verilog coding 全参数化设计 可以自己设定波特率 时钟频率等 完全FPGA实现调通-RS232 verilog coding the entire parametric design can set the baud rate clock frequency of FPGA to achieve complete transfer pass
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Size: 2048 |
Author: dinsh |
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Description: 很好用的串口通讯程序,已经通过验证,用Verilog语言编写的放心使用了!-Good use of serial communication program has been validated using Verilog language used in the rest assured!
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Size: 54272 |
Author: 宋振丰 |
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Description: 串口通讯 rs232 verilog程序,一次接受传送8bits-rs232 verilog project,reciver or trancimiter 8 bits onece
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Size: 2048 |
Author: 王翰林 |
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Description: 完整的RS232 Verilog源代码,支持波特率可调,支持调试命令,配合串口调试工具,可作为FPGA开发中的调试平台。-Full RS232 Verilog source code, support for baud rate is adjustable to support debugging command, with the serial debugging tools can be used as the debugging FPGA development platform.
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Size: 13312 |
Author: 弘历 |
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Description: RS232_串口通信的发送端verilog源程序代码-RS232_ serial communication sender verilog source code
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Size: 2048 |
Author: 咕嘟大树 |
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Description: rs232 verilog port from opencores.org
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Size: 5120 |
Author: vonbk |
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Description: 实现FPGA的RS232串行通信,采用verilog语言编写,下载到芯片上就可以使用-FPGA implementation of the RS232 serial communication, using verilog language, can be downloaded to the chip using
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Size: 600064 |
Author: shineson |
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Description: 本设计是PC和FPGA的串口通信的程序,用的是VERILOG语言,调试成功,用户可根据自己的项目稍作改动。-The design is a PC and the FPGA' s serial communication procedures, using a VERILOG language, debugged, the user can make a little change according to their own projects.
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Size: 2048 |
Author: 陆景鹏 |
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Description: 基于VERILog的RS232模块的程序,收发两个模块都有-The RS232 module based VERILog program, send and receive two modules have
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Size: 396288 |
Author: 冯超 |
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Description: It s combination logic for UART. Edited in verilog-HDL.
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Size: 5120 |
Author: kim |
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Description: 用verilog实现的RS232时序控制,完整可以使用的-RS232 verilog implementation with timing control, you can use the full
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Size: 1950720 |
Author: wangjinghui |
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Description: 串口RS232通信程序,包括对串口通信原理的说明。-RS232 serial communication program, including a description of the principles of serial communication.
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Size: 174080 |
Author: 邓民明 |
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Description: fpga上的串口驱动程序,包括接收主机来的数据(deserial)和发送由FPGA产生的数据(serial).该程序的调试需要借助串口调试助手-serial port driver on the fpga, including the receiving host to the data (deserial) and send the data generated by the FPGA (serial) to pc. The program needs the serial debug debugging assistant
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Size: 500736 |
Author: yvaine |
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Description: verilog语言编写,RS232通讯程序设计-verilog language, RS232 Communication Program Design
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Size: 8192 |
Author: 何沐 |
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