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[VHDL-FPGA-Verilog] bin2bcd

Description: Binary to BCD converter
Platform: | Size: 1024 | Author: Natacho | Hits:

[VHDL-FPGA-Verilog] MultBCD

Description: Multiplier BCD - vhdl-Multiplier BCD- vhdl
Platform: | Size: 303104 | Author: svxiuh | Hits:

[VHDL-FPGA-Verilog] 7-segment

Description: VHDL Design of BCD to 7-segment decoder using PROM
Platform: | Size: 60416 | Author: FATIMA | Hits:

[assembly language] BCD

Description: BCD=Boot Configuration Data (启动设置数据) ,BCD是操作系统中的启动设置数据， 　　在有vista或windows7的多重操作系统中，系统通bootmgr程序导入BCD文件完成启动菜单的引导。 　　可用bcdedit.exe程序来编辑BCD文件，来调整开机默认操作系统和等待时间。 -bcd
Platform: | Size: 3072 | Author: 廉子 | Hits:

[assembly language] bcd

Description: 实现一位BCD码的加法，并且带有进位。还可以利用逻辑电路实现此功能。-Code to achieve a BCD adder, and a binary. Logic circuits can also be used to achieve this functionality.
Platform: | Size: 3072 | Author: 廉子 | Hits:

[Other] bcdto7seg

Description: this a code for converting bcd to 7segment in fpga IC-this is a code for converting bcd to 7segment in fpga IC
Platform: | Size: 2048 | Author: soheil | Hits:

[Communication] BCDtoBIN

Description: BCD to BIN converter
Platform: | Size: 210944 | Author: Robee | Hits:

[OS program] CNV

Description: conversion from hex to ascii, ascii to hex, hex to bcd etc..enjoy
Platform: | Size: 1024 | Author: nilesh | Hits:

[assembly language] bcd

Description: Routine to convert to bcd
Platform: | Size: 1024 | Author: fkimongi | Hits:

[VHDL-FPGA-Verilog] BCD

Description: BCD数码管显示 在DE2平台上运行 quartus-BCD digital display in the DE2 platform quartus
Platform: | Size: 57344 | Author: johnson | Hits:

[SCM] BCD_clock_sim

Description: BCD时钟模拟程序包，包括全部PROTEUS工程文件和ASM源代码，基本跟真的一样了-BCD clock simulation package, including all the PROTEUS project documents and ASM source code is really basic with the same
Platform: | Size: 78848 | Author: 魏桐国 | Hits:

[VHDL-FPGA-Verilog] BIN_BCD

Description: 用硬件描述语音实现二进制数据转换成BCD数据-Using hardware description voice to achieve the binary data into BCD data
Platform: | Size: 620544 | Author: sleeeeeeep | Hits:

[VHDL-FPGA-Verilog] bcd-decoder

Description: 用Verilog实现的BCD译码器. 经Quartus||波形仿真无误 经硬件验证无误-BCD decoder Realized by Verilog
Platform: | Size: 55296 | Author: 萧月 | Hits:

[VHDL-FPGA-Verilog] HEX2BCD

Description: 基于fpga的二进制和BCD骂转换模块vhdl描述，只需修改相关参数即可使用-Fpga-based binary and BCD conversion module called vhdl description, simply modify the relevant parameters to use
Platform: | Size: 1024 | Author: 郭帅 | Hits:

[Windows Develop] bcd_bit_convert

Description: BCD码流（modelsim测试时需使用）转二进制码流（PCM）的matlab代码，给需要的朋友做个参考-BCD code stream (modelsim test to use) to a binary stream (PCM) of matlab code, to be a reference to a friend in need
Platform: | Size: 2048 | Author: hcf | Hits:

[VHDL-FPGA-Verilog] Binary_to_BCD_Converter

Description: General Binary-to-BCD Converter The linked code is a general binary-to-BCD Verilog module, and I have personally tested the code.
Platform: | Size: 25600 | Author: volkan | Hits:

[VHDL-FPGA-Verilog] HEX2BCD16

Description: 基于vhdl的二进制转BCD码的设计，已经经过调试，可直接使用-Vhdl based on binary code to BCD design, has been testing can be used directly
Platform: | Size: 1024 | Author: 郭帅 | Hits:

[STL] BCD

Description: 用于西门子S7200的BCD码的转换，相关的转换代码和控制程序可以我交流。-Siemens S7200 for the conversion of the BCD code
Platform: | Size: 3072 | Author: LEE | Hits:

[SCM] BinaryBCD

Description: binary can be change into bcd code ,you can download-binary can be change into bcd code, you can download
Platform: | Size: 33792 | Author: wang | Hits:

[VHDL-FPGA-Verilog] sn7448

Description: verilog实现的“BCD/七段译码器”。-verilog implementation " BCD/Seven-Segment Decoder."
Platform: | Size: 1024 | Author: 王先生 | Hits:
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