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[VHDL-FPGA-Verilog] VHDL-ROM4

Description: 基于ROM的正弦波发生器的设计：1.正弦发生器由波形数据存储模块（ROM），波形发生器控制模块及锁存模块组成 2.波形数据存储模块（ROM）定制数据宽度为8，地址宽度为6，可存储 64点正弦波形数据，用MATLAB求出波形数据。 3.将50MHz作为输入时钟。 -ROM-based design of the sine wave generator: 1. Sinusoidal waveform generator by the data storage module (ROM), waveform generator control module and latch module 2. Waveform data storage module (ROM) custom data width of 8 , address width of 6, can store 64 points sinusoidal waveform data, waveform data are obtained using MATLAB. 3. To 50MHz clock as input.
Platform: | Size: 98304 | Author: 宫逢源 | Hits:

[Other] experiment_7

Description: 基于ROM的正弦波发生器的设计:使用MATLAB得到这64个波形数据，将这些存数据写入一个ROM中。再输入时钟，每个上升沿依次读取一个波形数据-ROM-based sine wave generator of the design: the use of MATLAB to obtain waveform data 64, to write the data in a ROM. Re-enter the clock, each rising edge followed by a read waveform data
Platform: | Size: 101376 | Author: evelyn | Hits:

[VHDL-FPGA-Verilog] DDS

Description: 基于EPM7128的数字合成信号发生器（DDS）设计。通过对EPM7128编程，组合出地址累加器、数据锁存器、256*8位ROM空间。外接DA可实现正弦波输出功能-EPM7128-based signal generator for digital synthesis (DDS) design. EPM7128 through programming, the combination of address accumulator, data latches, 256* 8 ROM space. DA external sine wave output function can be realized
Platform: | Size: 354304 | Author: xiaoyu | Hits:

[VHDL-FPGA-Verilog] ROM_based_sine_wave_generator_VHDL_design

Description: VHDL基于ROM的正弦波发生器的设计的实验报告，内附源代码-ROM-based sine wave generator VHDL design of experiment reports, included the source code
Platform: | Size: 4096 | Author: CXJ | Hits:

[VHDL-FPGA-Verilog] VHDL(sin)

Description: 基于ROM的正弦波发生器的设计 一．实验目的 1. 学习VHDL的综合设计应用 2. 学习基于ROM的正弦波发生器的设计 二．实验内容 设计基于ROM的正弦波发生器，对其编译，仿真。 具体要求： 1.正弦发生器由波形数据存储模块（ROM），波形发生器控制模块及锁存模块组成 2.波形数据存储模块（ROM）定制数据宽度为8，地址宽度为6，可存储 64点正弦波形数据，用MATLAB求出波形数据。 3.将50MHz作为输入时钟。 -ROM-based sine wave generator design 1. Purpose of the experiment 1. VHDL Integrated Design and Application of Learning 2. Learning ROM-based sine wave generator design 2. Experimental content ROM-based sine wave generator design, its compilation, simulation. Specific requirements: 1. Sine wave generator by the data storage module (ROM), waveform generator control module and latch modules Two. Waveform data storage module (ROM) custom data width is 8, the address width of 6, can store 64-point sine wave data, wave data obtained using MATLAB. 3. The 50MHz input clock.
Platform: | Size: 17408 | Author: 爱好 | Hits:

[File Format] renyiboxing

Description: 信号发生器是一种常用的仪器，能够实现各种波形，不同频率的输出，电子测试系统的重要部件。本研究 的数字信号发生器足基于直接数字合成即DDS技术设计的，采用VHDL与C语言相结合的方法，通过查找存储 于ROM查找表中的各种标准波形数据，产牛频率Hf调并且高精度的正弦波、方波、锯齿波等常用信号，并且町 以通过修改表中的数据，实现任意信号发生器-Signal generator is a commonly used instrument to achieve a variety of waveforms of different frequency output, a key component of electronic test systems. In this study, full digital signal generator that is based on DDS technology of direct digital synthesis design, VHDL and C language using the method of combining, by looking up stored in ROM look-up table in a variety of standard waveform data, the cattle and the high frequency tone Hf accuracy of the sine wave, square wave, sawtooth and other signals used, and town to modify table data, an arbitrary signal generator
Platform: | Size: 268288 | Author: 姚木 | Hits:

[VHDL-FPGA-Verilog] ROM-based-sine-wave-generator-design

Description: 设计基于ROM的正弦波发生器，对其编译，仿真。 具体要求： 1.正弦发生器由波形数据存储模块（ROM），波形发生器控制模块及锁存模块组成 2.波形数据存储模块（ROM）定制数据宽度为8，地址宽度为6，可存储 64点正弦波形数据，用MATLAB求出波形数据。 3.将50MHz作为输入时钟。-ROM-based sine wave generator design, its compilation, simulation. Specific requirements: 1. Sine wave generator by the data storage module (ROM), waveform generator control module and latch module 2 waveform data storage module (ROM) custom data width is 8, the address width of 6, can store 64 point sine wave data, waveform data obtained using MATLAB. 3 to 50MHz clock as input.
Platform: | Size: 65536 | Author: 坐听晚风赏晚霞 | Hits:

[VHDL-FPGA-Verilog] VHDL

Description: VHDL设计的相关实验，包括4位可逆计数器，4位可逆二进制代码－格雷码转换器设计、序列检测器的设计、基于ROM的正弦波发生器的设计、数字密码锁的设计与实现。-VHDL design of experiments, including four reversible counters, four reversible binary code- Gray code converter design, the sequence detector design, the ROM-based sine wave generator design, digital lock design and implementation.
Platform: | Size: 49152 | Author: 张联合 | Hits:

[VHDL-FPGA-Verilog] VHDL-node

Description: VHDL的一些实验代码，其中有4位可逆计数器，4位可逆二进制代码－格雷码转换器设计、序列检测器的设计、基于ROM的正弦波发生器的设计、数字密码锁的设计与实现-Some experiments of VHDL code, which has four reversible counters, four reversible binary code- Gray code converter design, sequence detection Design, ROM-based sine wave generator design, digital design and implementation of lock
Platform: | Size: 49152 | Author: 张联合 | Hits:

[VHDL-FPGA-Verilog] vhdl

Description: VHDL实验报告 基于ROM的正弦波发生器的设计-VHDL experiment reports the ROM-based sine wave generator design
Platform: | Size: 2048 | Author: 天行者 | Hits:

[VHDL-FPGA-Verilog] dds_sin

Description: 基于FPGA的DDS信号发生器，可以在FPGA上实现正弦波的产生，用到isp协议，sin函数rom发生器，希望这些能帮助大家！-FPGA-based DDS signal generator, sine wave generation on the FPGA, used isp agreement, the sin function rom generator, I hope These can help you!
Platform: | Size: 681984 | Author: 520yunping1314 | Hits:

[VHDL-FPGA-Verilog] ROM-based-sine-wave-generator-of-the-design-the-u

Description: Rom based Sine wave generator
Platform: | Size: 1024 | Author: Ladik | Hits:

[Software Engineering] sin

Description: vhdl语言写的基于rom的正弦波发生器，包含代码和仿真图-VHDL language used to write rom-based sine wave generator contains code and simulation Figure
Platform: | Size: 71680 | Author: 张瑞萌 | Hits:

[VHDL-FPGA-Verilog] ddss

Description: 基于DDS技术和ROM压缩技术的正弦波信号发生器,具有更高的精度和更好的频谱特性。文件中包含设计源文件和Modelsim工程中的所有内容-sine wave signal generator ROM based on DDS technology and compression technology, with a greater precision and better spectrum. File contains all of the content including source file and modelsim project design files
Platform: | Size: 1811456 | Author: qinjing | Hits:

[VHDL-FPGA-Verilog] sin_generator

Description: 基于QUARTUS ii的ROM的正弦方波锯齿信号发生器。-Sine square, wave saw and tooth signal generator based on ROM of QUARTUS II.
Platform: | Size: 2436096 | Author: | Hits:

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