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VHDL-FPGA-Verilog list
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spi dac for artix7 vivado
Update : 2025-01-16 Size : 24.37mb Publisher : ravenelco

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top transmition of implement spi, compiled in vivado 2016 in basys 3
Update : 2025-01-16 Size : 177kb Publisher : ravenelco

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RS422 protocol chip OX16C950 low-level driver, Verilog language, Quartus ii 15.0 development, can achieve data transceiver, with the serial debugging assistant can be observed.
Update : 2025-01-16 Size : 3.32mb Publisher :

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Multi-cycle CPU design of the controller.
Update : 2025-01-16 Size : 7.17mb Publisher : 林恣

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FPGA LED QUARTUISS VHDL
Update : 2025-01-16 Size : 11kb Publisher : z

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DVI encode and decode in Verlog language.Have been tested in altera FPGA Cycloene IV
Update : 2025-01-16 Size : 46kb Publisher :

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hdmi encoder and decoder in verilog.
Update : 2025-01-16 Size : 42kb Publisher :

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jpeg encoder ,has been tested in altera FPGA
Update : 2025-01-16 Size : 101kb Publisher :

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Wallace multiplier using VHDL. THis code is constructed using full adders and half adder circuits.
Update : 2025-01-16 Size : 363kb Publisher : nisal senarathne

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USB+UART+I2C+VGA+ARM7+MC8051 Verrlog VHDL
Update : 2025-01-16 Size : 3.63mb Publisher : 刘春焱

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Verilog language with the digital oscillator, both through the frequency control word to adjust the output frequency, you can also adjust the output phase through the phase control word, has been verified through debuggi
Update : 2025-01-16 Size : 1kb Publisher : houjunfeng

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VHDL language with the frequency of the system program, it is worth learning program ideas
Update : 2025-01-16 Size : 98kb Publisher : houjunfeng
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