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VHDL-FPGA-Verilog list
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Dac_spi
Downloaded:0
spi dac for artix7 vivado
Update
: 2025-01-16
Size
: 24.37mb
Publisher
:
ravenelco
rna
Downloaded:0
top transmition of implement spi, compiled in vivado 2016 in basys 3
Update
: 2025-01-16
Size
: 177kb
Publisher
:
ravenelco
zsy_422_20160911_backup
Downloaded:0
RS422 protocol chip OX16C950 low-level driver, Verilog language, Quartus ii 15.0 development, can achieve data transceiver, with the serial debugging assistant can be observed.
Update
: 2025-01-16
Size
: 3.32mb
Publisher
:
李
OExp11-OwnMCPU
Downloaded:0
Multi-cycle CPU design of the controller.
Update
: 2025-01-16
Size
: 7.17mb
Publisher
:
林恣
LED
Downloaded:0
FPGA LED QUARTUISS VHDL
Update
: 2025-01-16
Size
: 11kb
Publisher
:
z
dvi_demo
Downloaded:0
DVI encode and decode in Verlog language.Have been tested in altera FPGA Cycloene IV
Update
: 2025-01-16
Size
: 46kb
Publisher
:
杜
hdmi_demo
Downloaded:0
hdmi encoder and decoder in verilog.
Update
: 2025-01-16
Size
: 42kb
Publisher
:
杜
fpga-jpeg
Downloaded:0
jpeg encoder ,has been tested in altera FPGA
Update
: 2025-01-16
Size
: 101kb
Publisher
:
杜
PART5
Downloaded:0
Wallace multiplier using VHDL. THis code is constructed using full adders and half adder circuits.
Update
: 2025-01-16
Size
: 363kb
Publisher
:
nisal senarathne
IP
Downloaded:0
USB+UART+I2C+VGA+ARM7+MC8051 Verrlog VHDL
Update
: 2025-01-16
Size
: 3.63mb
Publisher
:
刘春焱
NCO
Downloaded:0
Verilog language with the digital oscillator, both through the frequency control word to adjust the output frequency, you can also adjust the output phase through the phase control word, has been verified through debuggi
Update
: 2025-01-16
Size
: 1kb
Publisher
:
houjunfeng
freq_cnt
Downloaded:0
VHDL language with the frequency of the system program, it is worth learning program ideas
Update
: 2025-01-16
Size
: 98kb
Publisher
:
houjunfeng
«
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.19
.20
.21
.22
.23
324
.25
.26
.27
.28
.29
...
4311
»
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