VHDL-FPGA-Verilog List Page 334

VHDL-FPGA-Verilog list

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gtx_drp Downloaded：0: High-speed serial design FPGA-GTX IP setting generation drp module, dynamically configurable rate 2.4Gbps, 1.2Gbps, 0.6Gbps, adaptive link
Update : 2025-01-16 Size : 2kb Publisher : 周召涛
pcie_ctrl_module Downloaded：1: pcie gen4 controller module verilog, direct memory read and write memory
Update : 2025-01-16 Size : 29kb Publisher : 周召涛
rs232-485-422 Downloaded：0: This file contains the serial transceiver module and the codec module Automatic baud rate
Update : 2025-01-16 Size : 6kb Publisher : 周召涛
Quartus_II_15.0_crack_Windows Downloaded：0: Quartus II 15.0 crack for Windows
Update : 2025-01-16 Size : 75kb Publisher : 熊丽亚
ZHWX Downloaded：0: DDS. Resulting in sinusoidal signal, OOK, AM three waveforms. Using xilinx FPGA VHDL.
Update : 2025-01-16 Size : 2.71mb Publisher : 张文轩
traffic Downloaded：0: Experimental traffic lights, Nanchang University EDA course, absolutely useful
Update : 2025-01-16 Size : 112kb Publisher : yangrenbing
Tristate-buffers Downloaded：0: This procedure completion tristate buffers using hardware programming language VHDL implementation.
Update : 2025-01-16 Size : 19kb Publisher : 杨好人
multichannel-selector Downloaded：0: This program implements a second election multiplexer hardware function, written in VHDL language.
Update : 2025-01-16 Size : 21kb Publisher : 杨好人
Serial-borrow-eight-subtracte Downloaded：0: This program implements eight serial borrow subtractor, using VHDL language.
Update : 2025-01-16 Size : 25kb Publisher : 杨好人
Digital-clock Downloaded：0: When the Quartus programming software and EDA experiment board (chip EP1C6Q240C8) complete digital clock, digital clock showing the hours, minutes and seconds functions.
Update : 2025-01-16 Size : 91kb Publisher : 杨好人
My-And Downloaded：0: And port made with nand gates in Verilog
Update : 2025-01-16 Size : 133kb Publisher : john li
Oc_spi Downloaded：0: SPI Master Core Specification
Update : 2025-01-16 Size : 77kb Publisher : zht

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