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VHDL-FPGA-Verilog list
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module-car
Downloaded:0
this program describes the state machine function by verilog code
Update
: 2025-01-16
Size
: 11kb
Publisher
:
Sureetha
ARM-LED
Downloaded:0
this code gives the function of ARM processor
Update
: 2025-01-16
Size
: 10kb
Publisher
:
Sureetha
ARM7SEG
Downloaded:0
this code gives the ARM processor function in 7segment
Update
: 2025-01-16
Size
: 10kb
Publisher
:
Sureetha
Proteus-lcd
Downloaded:0
This gives the function of proteus
Update
: 2025-01-16
Size
: 11kb
Publisher
:
Sureetha
State-Machine
Downloaded:0
This gives the function of state machine
Update
: 2025-01-16
Size
: 11kb
Publisher
:
Sureetha
scsa
Downloaded:0
Speculative variable latency adders have attracted strong interest thanks to their capability to reduce average delay compared to traditional architectures. This proposes a novel variable latency speculative adder based
Update
: 2025-01-16
Size
: 2kb
Publisher
:
preethi/charu
Han-carlson.ppt
Downloaded:0
Abstract—Variable latency adders have been recently proposed in literature. A variable latency adder employs speculation: the exact arithmetic function is replaced with an approximated one that is faster and gives the co
Update
: 2025-01-16
Size
: 42kb
Publisher
:
preethi/charu
mux
Downloaded:0
This file is about mux in ISE by VHDL language.
Update
: 2025-01-16
Size
: 9kb
Publisher
:
najme
shizhong
Downloaded:0
VHDL design with alarm 59 minutes timer
Update
: 2025-01-16
Size
: 14kb
Publisher
:
王一
ALU-Design
Downloaded:0
8 bit alu design features: optimized design inclusive of multiplier
Update
: 2025-01-16
Size
: 1019kb
Publisher
:
Ashutosh
float_point_divide.tar
Downloaded:0
this project divide two floating point number.
Update
: 2025-01-16
Size
: 182kb
Publisher
:
ali
VHDL_4bit_magnde_compar_code_dataflow
Downloaded:0
this is a source code for a 4 bit magnitude comparator using dataflow technique a 4 bit magnitude comparator logic circuit.
Update
: 2025-01-16
Size
: 1kb
Publisher
:
KENNETH JAJA
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