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VHDL-FPGA-Verilog list
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FPGA I2C Model Sample Code Docs
Update : 2025-01-16 Size : 210kb Publisher : zht

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Simple Microprocessor Design (ESD Book Chapter 3) Copyright 2001 Weijun Zhang Controller (control logic plus state register) VHDL FSM modeling
Update : 2025-01-16 Size : 2kb Publisher : mohamed

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Simple Microprocessor Design memory 256*16 8 bit address 16 bit data memory.vhd
Update : 2025-01-16 Size : 1kb Publisher : mohamed

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FIR Digital Filter Design (DSP example) tested by Weijun Zhang, 04/2001 VHDL Data-Flow modeling KEYWORD: generate, array, range, constant and subtype
Update : 2025-01-16 Size : 1kb Publisher : mohamed

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Simple Bridge (ESD book figure 2.14) by Weijun Zhang, 04/2001 RT level design using Controller(FSM) + DataPath
Update : 2025-01-16 Size : 2kb Publisher : mohamed

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GCD CALCULATOR (ESD book figure 2.11) Weijun Zhang, 04/2001 we can put all the components in one document(gcd2.vhd) or put them in separate files this is the example of RT level modeling (FSM + DataPath) the code is syn
Update : 2025-01-16 Size : 2kb Publisher : mohamed

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The FPGA-based Verilog_HDL program (smart washing machines) for the development of tools to DE0 board
Update : 2025-01-16 Size : 207kb Publisher : Jordan Dick

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SPI-based EEPROM controller
Update : 2025-01-16 Size : 6kb Publisher : larry

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FULL SHA IP DATABASE
Update : 2025-01-16 Size : 121kb Publisher : zhangbin

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8BIT RISC MCU implemention reference ip,include rtl code,simulation and document
Update : 2025-01-16 Size : 2.27mb Publisher : zhangbin

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SRAM-IS61LV25616, SRAM read and write operations performed on Taobao bought
Update : 2025-01-16 Size : 4.99mb Publisher : 吴昊

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I2c source code based on Verilog
Update : 2025-01-16 Size : 3kb Publisher : zhaodong
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