VHDL-FPGA-Verilog List Page 4143

VHDL-FPGA-Verilog list

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fpga(CAN) Downloaded：0: fpga CAN Bus Controller source, each with explanatory documents on the use of methods.
Update : 2025-01-11 Size : 845kb Publisher : 刘立
digital_clock Downloaded：0: verlog language with a good addendum to the comprehensive experiment, particularly suitable for FPGA/CPLD beginners
Update : 2025-01-11 Size : 267kb Publisher : leolili
traffic_lamp Downloaded：0: verlog language used is an addendum to the good of the experiment (traffic light control), particularly suitable for FPGA/CPLD beginners
Update : 2025-01-11 Size : 261kb Publisher : leolili
verlog_basic Downloaded：0: verlog used some language addendum to the basic experiment, which is suitable for FPGA/CPLD beginners. Including eight priority encoder, multipliers, dividers, multi-path selectors, binary switch BCD, adder, subtraction,
Update : 2025-01-11 Size : 981kb Publisher : leolili
VHDLverilogshirenqiangdaqi Downloaded：0: using VHDL and verilog realization of four Responder
Update : 2025-01-11 Size : 5kb Publisher : qihuolin
SPI_VHDL Downloaded：0: the SPI Serial Kernel (vhdl) can be used directly qII software foisted CPLD or FPGA inside.
Update : 2025-01-11 Size : 13kb Publisher : efly
8051core_vhdl Downloaded：0: 8051 kernel (vhdl) This is version 1.1. Of the M C8051 IP core. FPGA operation. have the energy for the study.
Update : 2025-01-11 Size : 208kb Publisher : efly
uart_core_vhdlORverilog Downloaded：0: uart series of vhdl and verilog. lattic achieve the original code, there are four documents, Source respectively UART (lattice version) \ uart source (Verilog) \ uart source (VHDL) \ uart16550.tar
Update : 2025-01-11 Size : 288kb Publisher : efly
shuzimiaobiao Downloaded：0: verilog achieved using a digital stopwatch Design
Update : 2025-01-11 Size : 1kb Publisher : qihuolin
K100_SONGER Downloaded：0: VHDL Counter
Update : 2025-01-11 Size : 211kb Publisher : 阳光
EP1C3_12_9_DDS Downloaded：0: direct digital frequency synthesis (DDS) experimental design (Electronic Design Contest tournament title) said other details Please refer to prescribed http://www.kx-soc.com
Update : 2025-01-11 Size : 41kb Publisher : 阳光
baseball Downloaded：0: VHDL development of the baseball game, in QuartusII environment compiler, apply to all FPGA development board.
Update : 2025-01-11 Size : 55kb Publisher : zhang

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