100MHZ clock signal through a divider to get 1HZ signal, and then input to the three counters, the output of the counter displayed on the corresponding LED lights on the FPGA. The program consists of four main parts: the Update : 2025-02-21
Size : 1kb
Publisher : asong
This program uses the always statement to realize 3-8 decoder function, simulation waveform is right. Update : 2025-02-21
Size : 119kb
Publisher : Dr.Shang
This program uses the assign statement to realize 3-8 decoder function, simulation waveform is right. Update : 2025-02-21
Size : 127kb
Publisher : Dr.Shang