VHDL-FPGA-Verilog List Page 67

VHDL-FPGA-Verilog list

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sdram_test Downloaded：0: For the black gold AX309 development board SDRAM control program. Based on ISE 14.7, the language is Verilog. Measured available.
Update : 2024-12-24 Size : 2.67mb Publisher : 曹玄德
I2Cdev Downloaded：0: ddfsgdvcxgemhgkirsgvvfhyaearrheG
Update : 2024-12-24 Size : 13kb Publisher : EEQQ
fp Downloaded：0: divide the frequency
Update : 2024-12-24 Size : 4.05mb Publisher : dsfdgds
5_DE1-SoC_Training materials Downloaded：0: Basic development training course based on DE1 SOC
Update : 2024-12-24 Size : 16.85mb Publisher : 管焰秋
8051_latest.tar Downloaded：0: something about a kind of processor that simulates the 8051 project that someone havs been working on it.
Update : 2024-12-24 Size : 6.68mb Publisher : teck
ContadorBCDFinal Downloaded：0: Codigo BCD en lenguaje descriptivo verilog CINVES
Update : 2024-12-24 Size : 1kb Publisher : danoboook
ALU ALU Downloaded：0: Codigo para un sumador en verilog
Update : 2024-12-24 Size : 2kb Publisher : danoboook
uart Downloaded：0: UART interface is implemented by FPGA
Update : 2024-12-24 Size : 3.78mb Publisher : 恰同学少年111
cy4_fenpin Downloaded：0: Complete arbitrary frequency division
Update : 2024-12-24 Size : 7.47mb Publisher : 春坡
SHFRTWORD Downloaded：0: Character switching through state machines.
Update : 2024-12-24 Size : 563kb Publisher : otiower
04.交通灯 Downloaded：0: void setup() { pinMode(redled, OUTPUT);/ pinMode(yellowled, OUTPUT) pinMode(greenled, OUTPUT); }
Update : 2024-12-24 Size : 326kb Publisher : acba
05.按键控制 Downloaded：0: Let's try to use the input function of the I/O port of Arduino, that is, to read the output value of the external device. We use a button and a LED lamp to complete an input and output experiment.
Update : 2024-12-24 Size : 857kb Publisher : acba

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