VHDL-FPGA-Verilog List Page 69

VHDL-FPGA-Verilog list

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ledrun Downloaded：0: Basic flow lamp program
Update : 2024-12-24 Size : 2.94mb Publisher : felix002
08_ethernet_1g Downloaded：0: Artix7 XC7A100T chip control Gigabit PHY two layer communication, source code
Update : 2024-12-24 Size : 15.51mb Publisher : kang24
09_ethernet_100 Downloaded：0: Two layer communication Artix7 XC7A100T chip control PHY megabytes, source code
Update : 2024-12-24 Size : 15.42mb Publisher : kang24
Adept SDKv1-3 Downloaded：0: Examine your code to determine if this port should be declared as an INOUT, or if the assignment to this port should not have been made. If this signal connects to submodules, consider the type and lower-level functional
Update : 2024-12-24 Size : 158kb Publisher : 超93
spi_master Downloaded：0: The SPI code written in Verilog is readable and writable. After the simulation is finished, it is not yet on board. Awkwardly, it is mainly that official restrictions can not be downloaded from the official limit to ~ ~
Update : 2024-12-24 Size : 1kb Publisher : 你到底是谁
VHDL简易电子琴设计(1).doc Downloaded：0: The design of a simple electronic organ based on VHDL, with the automatic playing and the use of keystrokes to make different tones
Update : 2024-12-24 Size : 122kb Publisher : 找你呢
fpga-b210-verilog Downloaded：1: The USRP system, the FPGA source of the B210 product, is still more valuable.
Update : 2024-12-24 Size : 31.45mb Publisher : ljafjaie
CAR_LI2 Downloaded：0: DE1-SOC experiment development board and Verilog HDL language interactive program works. Our group chooses obstacle avoidance car as curriculum design topic, and according to the selected topic, we have designed the foll
Update : 2024-12-24 Size : 20.17mb Publisher : Sven111
exp_fft_test_724 Downloaded：0: In the quartus software, the IP kernel of FFT is called, and the driver module of the IP kernel is edited, so that the IP kernel is read into the data for processing and output data. Use Modelsim for joint simulation.
Update : 2024-12-24 Size : 26.28mb Publisher : XHF72
Assignment-1.3.tar Downloaded：0: verilog codes for different basic digital circuits elements
Update : 2024-12-24 Size : 38kb Publisher : guy03
Assignment-2.1.tar Downloaded：0: verilog codes for different basic digital circuits elements new
Update : 2024-12-24 Size : 34kb Publisher : guy03
Assignment-2.2.tar Downloaded：0: verilog-HDL codes for different basic digital circuits elements
Update : 2024-12-24 Size : 26kb Publisher : guy03

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