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VHDL-FPGA-Verilog list
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Assignment-2.3.tar
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HDL code using verilog
Update : 2024-12-24 Size : 19kb Publisher : guy03
Q1.tar
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implementation of basic elecronics components using verilog HDL
Update : 2024-12-24 Size : 1kb Publisher : guy03
Q2.tar
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vereilog design files for beginer
Update : 2024-12-24 Size : 1kb Publisher : guy03
Q3.tar
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hdl using verilog lenguage
Update : 2024-12-24 Size : 1kb Publisher : guy03
Q4-a.tar
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verilog coding beginer level
Update : 2024-12-24 Size : 1kb Publisher : guy03
Q4-b.tar
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beginer level verilog coding
Update : 2024-12-24 Size : 1kb Publisher : guy03
Q22-c.tar
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hdl design using verilog for beginer
Update : 2024-12-24 Size : 2kb Publisher : guy03
异步FIFO
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Verilog code of my own synchronous and asynchronous FIFO, verified,and reliable.
Update : 2024-12-24 Size : 2kb Publisher : 大黄黄黄
uart_txd
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Serial data transmission module implemented with VHDL.The software used is ISE and modelsim.
Update : 2024-12-24 Size : 192kb Publisher : xdytf
project_PmodMic_PmodAMP2_1
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Use digisen's basys3 development board, external Pmodmic and PmodAMP2 modules to achieve sound collection and recovery. The program is based on VIVADO 2015.4 with an instantiated low-pass filter. Actually available.
Update : 2024-12-24 Size : 16.05mb Publisher : 曹玄德
project_PmodKYPD
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Digilent's BASYS3 development board and PmodKYPD module are used to detect keystrokes. The program is based on VIVADO 2015.4 and the language is verilog.
Update : 2024-12-24 Size : 537kb Publisher : 曹玄德
vga_test
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The black gold board AX309 realizes the control of the VGA port and drives the display of the display. The program is based on ISE14.7 and the language is Verilog. Measured available.
Update : 2024-12-24 Size : 832kb Publisher : 曹玄德
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