VHDL-FPGA-Verilog List Page 36

VHDL-FPGA-Verilog list

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XILINX平台DDR3设计教程 Downloaded：1: This is a zero to start Xilinx DDR3 control program written tutorial, the use of MIS IP kernel through the self compiled logic to achieve DDR3 reading and writing, strongly recommended.
Update : 2024-12-23 Size : 21.94mb Publisher : 喵卡琳
电子时钟 Downloaded：1: Digital clock based on DE2-115 1. LCD display, digital tube display 2. whole point 3. alarm clock 4. setting time 5. set the alarm clock
Update : 2024-12-23 Size : 4.69mb Publisher : AZ1111
数码管显示 Downloaded：1: Rolling on the digital tube to display the school number
Update : 2024-12-23 Size : 615kb Publisher : 低转的丝巾
FPGA乐曲演奏电路 Downloaded：0: design of music hardware performance circuit(verilogVHDL)
Update : 2024-12-23 Size : 948kb Publisher : Dexter_
实验九计算机核心（CPU+RAM）的设计与实现 Downloaded：0: CPU experiment of computer organization principle, based on quartus platform
Update : 2024-12-23 Size : 3.21mb Publisher : 丁丫头
mux16 Downloaded：0: FPGA multiplier program based on quartus
Update : 2024-12-23 Size : 2kb Publisher : 艾尼more
ad9833 Downloaded：1: AD9833's FPGA driver, a programming idea, easy to understand, suitable for beginners.
Update : 2024-12-23 Size : 5.71mb Publisher : halftop
rs232 Downloaded：0: The complete project of serial communication is compiled on the vivado platform using VHDL language, and it can be successfully verified with the EGO1 development board.
Update : 2024-12-23 Size : 681kb Publisher : vmansus
俄罗斯方块 Downloaded：0: Tetris is implemented by VGA and implemented by Verilog code.
Update : 2024-12-23 Size : 18.15mb Publisher : smily520
cpu自制入门代码AZPR_RTL Downloaded：0: CPU DIY ............
Update : 2024-12-23 Size : 78kb Publisher : dastudio
DHT11 Downloaded：0: The realization of DHT11 temperature and humidity reading by Verilog
Update : 2024-12-23 Size : 920kb Publisher : iseaad
sha1_latest.tar Downloaded：1: SHA message digest, a hash algorithrim, very useful
Update : 2024-12-23 Size : 45kb Publisher : dailyviola

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